NVIDIA Adjusts HBM4 Memory Specifications for Next-Generation "Rubin" GPUs

NVIDIA is reportedly revising its performance requirements for HBM4 memory in its upcoming "Rubin" GPUs, following challenges faced by leading memory manufacturers SK hynix and Samsung in meeting the original ambitious targets. According to a recent analysis from SemiAnalysis, NVIDIA has decided to lower its specification requirements for the next-generation GPU lineup.

Initially, NVIDIA aimed for a total memory bandwidth of 22 TB/s for the Rubin chip. However, due to ongoing difficulties in achieving these speeds, the first shipments are now expected to deliver closer to 20 TB/s, equating to approximately 10 Gbps per pin for HBM4 memory. This adjustment signals a slight setback in NVIDIA’s aggressive upgrade plans for the "Vera Rubin" platform, with final performance figures expected to be somewhat lower than originally projected.

Evolution of Bandwidth Targets for "Vera Rubin" Systems

The performance targets for NVIDIA’s "Vera Rubin" VR200 NVL72 system have evolved significantly over time. In March 2025, the initial bandwidth goal was set at 13 TB/s, which was later increased to 20.5 TB/s by September. At CES 2026, NVIDIA announced that the VR200 NVL72 system had reached 22 TB/s of bandwidth. This positioned NVIDIA ahead of competitors such as AMD’s Instinct MI455X accelerator, which offers 19.6 TB/s of bandwidth.

To achieve these higher bandwidths, NVIDIA implemented faster DRAM and enhanced interconnects between CPUs, GPUs, and the broader system architecture. However, with SK hynix and Samsung encountering production challenges, the anticipated HBM4 speeds for the "Vera Rubin" system are now expected to be around 20 TB/s.

HBM4 Supply Chain Dynamics

The supply landscape for HBM4 memory is also shifting. According to institutional notes from SemiAnalysis, SK hynix is projected to supply approximately 70% of the HBM4 memory for NVIDIA’s VR200 NVL72 systems, while Samsung will provide the remaining 30%. Notably, Micron is reportedly not participating in the HBM4 supply for this generation. Instead, Micron will focus on supplying LPDDR5X memory for "Vera" CPUs, which can be configured with up to 1.5 TB of LPDDR5X, offsetting its absence from the HBM4 market.

These developments highlight the complexities of advancing GPU memory technology and the critical role of the supply chain in meeting the demands of next-generation AI and high-performance computing workloads. As NVIDIA adapts its specifications, the industry will be closely watching how memory manufacturers respond to these evolving requirements.